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OpenMoko Neo Debug Board v3 kit
The OpenMoko Debug Board v3 was originally developed to assist development and debugging of the system-level sotware of the OpenMoko Neo1973 (GTA01) and FreeRunner (GTA02) phones.Those phones were new and exciting in 2008/2009, but are of course only of historic relevance these days.Nevertheless, the OpenMoko Debug Board v3 can be used as general-purpose ARM-JTAG adapter and USB-UART for 3.3V ARM targets.  It's supported by OpenOCD.We recently received a batch of surplus units for free from kd85.com, one of the importers of Openmoko products into the European Union back then.  We are making those boards available at the symbolic price of 1 EUR.  You can also choose to pay a higher price if you'd like to contribute some funds towards the continued hosting costs of the Openmoko servers/archive.The Kit contains:a fully-assembled OpenMoko Debug Borad v3 PCBA (Printed Circuit Board Assembly)a USB A to mni-B cablea FPC cable to connect the debug board with an Openmoko GTA01/GTA02 phonea Torx T6 screwdrivera plectrum to open snapped plastics enclosuressome meal mounting accessoriesYou can find more information about the debug board, including a block diagram, schematics in PDF format and example OpenOCD configuration at http://wiki.openmoko.org/wiki/Debug_Board_v3

JTAG-lock-pick Tiny 2
JTAG-lock-pick Tiny 2 is an ARM core processors’ JTAG using USB 2.0 bus to connect to PC. The device is based on FTDI FT232H chip.  Designs goals of JTAG-lock-pick Tiny 2 project were to create a small and cheap, but at the same time fully functional and fast, interface that would fit various needs.Thanks to USB bus the device can be connectedto any PC on the market – it would not be possible with parallel interface (LPT), which is completely obsolete nowadays. Use of more recent standard – USB 2.0 – allows to increase speed of operation by 30 – 270% when compared to USB 1.x.Maximum frequency of JTAG interface’s clock is 30MHz and it is also possible to use RTCK mode (so called Adaptive Clocking, in which clock frequency adapts itself dynamically to target chip’s clock, using feedback connection). Use of advanced CPLD chip – Lattice’s ispMACH 4000ZE series – as line buffers allows connecting target devices with wide range of supply voltage – from 1.4V to 3.6V. Inputs of the interface tolerate voltage higher than supply voltage (up to 5.5V), so it’s possible to use 5V target chips under additional conditions (more information in manual).Additionally JTAG-lock-pick Tiny 2 supports communication with target chip via new SWD (Serial Wire Debug) interface, which uses only two lines – bidirectional data line SWDIO and clock SWCLK.JTAG-lock-pick Tiny 2 interface can be used to program other types of target chips, such as FPGA, CPLD, AVR or MIPS.JTAG-lock-pick Tiny 2 is partially compatible with KT-LINK interface manufactured by KrisTech, thus in many applications it is possible to use existing configurations instead of creating them manually.JTAG-lock-pick Tiny 2 interface has separate SRST and TRST lines, which can be independently configured to push-pull or open-drain mode.“Strong points” of JTAG-lock-pick Tiny 2 projectUSB 2.0 Hi-Speed 480Mbps bus,support for SWD (Serial Wire Debug) interface,JTAG clock frequency up to 30MHz, support for Adaptive Clocking using RTCK line,safe and reliable communication with target devices with supply voltage in the range from 1.4V up to 3.6V, inputs tolerate up to 5.5V signals, all lines buffered with advanced CPLD chip,separate SRST and TRST lines, which can be independently configured to push-pull or open-drain mode,transparent heat-shrink tube “enclosure”, which protects JTAG, connected PC and target device from accidental damage,small size of whole device (approximate dimensions 55mm x 34mm x 12mm) and small priceYou can find more information in the JTAG-lock-pick Tiny 2 manual. There are also Windows Drivers available